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Assembly Source File  |  1991-09-09  |  7KB  |  172 lines
  1. ******************************************************************************
  2. ******************************************************************************
  3. *                                                                            *
  4. *                    Routine to Verify D3 EPROM Contents                     *
  5. *                                                                            *
  6. ******************************************************************************
  7. *                                                                            *
  8. * Program Name: GVERD3.ASM                                                   *
  9. * Revision: 0.03                                                             *
  10. * Date: 9/09/91                                                              *
  11. * Written By: Robert Chretien                                                *
  12. *             Motorola MCU Applications                                      *
  13. * Assembled Under: Motorola Portable Cross Assembler (PASM) or               *
  14. *                  Motorola Freeware Assembler (AS11)                        *
  15. * Program Description:                                                       *
  16. *                                                                            *
  17. *                                                                            *
  18. *                                                                            *
  19. *                                                                            *
  20. *                                                                            *
  21. ******************************************************************************
  22. *                                                                            *
  23. * Revision Descriptions:                                                     *
  24. * 1. Rev 0.00: Original program.                                             *
  25. * 2. Rev 0.01: Added header and comments.                                    *
  26. *              Removed Wait4Trans since was not used.                        *
  27. *              If does not verify the LED is turned off to ID problem board. *
  28. *              LED is turned on at start of program.                         *
  29. * 3. Rev 0.02: Use different means of determining end of s19 file so that    *
  30. *              now there is no limit to the size of the file.                *
  31. *              Modified software handshaking to increase speed of transfer   *
  32. *              between HC11 and IBM.                                         *
  33. *              Changed programming delay down to 2ms per spec.               *
  34. * 4. Rev 0.03: Gets boot ROM start address from boot reset vector rather     *
  35. *              than assuming it will always stay the same.                   *
  36. *                                                                            *
  37. ******************************************************************************
  38. ******************************************************************************
  39.  
  40. RAM          EQU        $0040
  41. REGS         EQU        $0000
  42. Eprom        EQU        $F000
  43. Vectors         EQU    $FFD6
  44. PortA        EQU        REGS+$00
  45. PortC        EQU        REGS+$03
  46. PortB        EQU        REGS+$04
  47. DDRC         EQU        REGS+$07
  48. PortD        EQU        REGS+$08
  49. DDRD         EQU        REGS+$09
  50. CFORC        EQU        REGS+$0B
  51. TCNT         EQU        REGS+$0E
  52. TOC2         EQU        REGS+$18
  53. TCTL1        EQU        REGS+$20
  54. TCTL2        EQU        REGS+$21
  55. TMSK1        EQU        REGS+$22
  56. TFLG1        EQU        REGS+$23
  57. TMSK2        EQU        REGS+$24
  58. TFLG2        EQU        REGS+$25
  59. PACTL        EQU        REGS+$26
  60. Baud         EQU        REGS+$2B
  61. SCCR2        EQU        REGS+$2D
  62. SCSR         EQU        REGS+$2E
  63. SCDR         EQU        REGS+$2F
  64. OPTION       EQU        REGS+$39
  65. *
  66. *
  67. *
  68. TalkAddress  EQU     RAM
  69. Address      EQU     RAM+1
  70. RecordLength EQU     RAM+3
  71. CheckSum     EQU     RAM+4
  72. BoardAddress EQU     RAM+5
  73. *
  74. *
  75. *
  76.              ORG     RAM
  77. Initial      LDS     #$00FF               !Set stack pointer to $FF.
  78.              LDAA    #$30
  79.              STAA    Baud                 !With 8MHz crystal, baud=9600.
  80.              LDAA    #$0C
  81.              STAA    SCCR2                !Transmitter and receiver enabled.
  82.              LDAA    #%00100000
  83.              STAA    DDRD
  84.              STAA    PortD
  85. *
  86. *
  87. *
  88. CalCheckSum  LDAA    #$05
  89.              STAA    CheckSum
  90. CalAddress   LDAA    PortD
  91.              LSRA
  92.              LSRA
  93.              ANDA    #%00000111
  94.              STAA    BoardAddress
  95. BootRecAddr  BSR     RecOneAddr
  96.              CBA
  97.              BNE     Boot4Last
  98.              STAA    SCDR
  99.              BSR     RecOneAddr
  100.              LDAA    CheckSum
  101.              STAA    SCDR
  102. Boot4Last    CMPB    #08
  103.              BNE     BootRecAddr
  104. *
  105. *
  106. *
  107.              CLR     CheckSum
  108.              CLR     TalkAddress
  109. RecTalk      BSR     RecOneAddr
  110.              CBA
  111.              BNE     RecNewRec
  112.              STAA    SCDR
  113.              INC     TalkAddress
  114. RecNewRec    LDX     #Address
  115.              LDY     #3
  116. RecTranInfo  BSR     RecOneAddr
  117.              STAB    0,X
  118.              LDAA    TalkAddress
  119.              BEQ     IncX1
  120.              STAB    SCDR
  121. IncX1        INX
  122.              DEY
  123.              BNE     RecTranInfo
  124.              LDX     Address
  125.              BEQ     Wait4Mine
  126.              LDAB    RecordLength
  127.              SUBB    #3                   !Record length contains byte
  128.              CLRA                         ! count for address and checksum.
  129.              XGDY
  130. RecData      BSR     RecOneAddr
  131.              LDAA    0,X
  132.              CBA
  133.              BEQ     OKThisPass
  134.              LDAB    #$01
  135.              STAB    CheckSum
  136.              LDAB    #$00
  137.              STAB    PortD
  138. OKThisPass   LDAB    TalkAddress
  139.              BEQ     IncX2
  140.              STAA    SCDR
  141. IncX2        INX
  142.              DEY
  143.              BNE     RecData
  144.              BRA     RecNewRec
  145. Wait4Mine    BSR     RecOneAddr
  146.              CBA
  147.              BNE     Chck4Last
  148.              STAA    SCDR
  149.              BSR     RecOneAddr
  150.              LDAA    CheckSum
  151.              STAA    SCDR
  152. Chck4Last    CMPB    #08
  153.              BNE     Wait4Mine
  154.              BSR     RecOneAddr
  155.              LDX     $BFFE
  156.              JMP     0,X                  !Jump back to Boot ROM.
  157. *
  158. *
  159. *
  160. RecOneAddr   LDAA    BoardAddress
  161.              LDAB    SCSR
  162.              ANDB    #%00100000
  163.              BEQ     RecOneAddr
  164.              LDAB    SCDR
  165.              RTS
  166. *
  167. *
  168. *
  169. END          EQU     *
  170.              END
  171.  
  172.